AD5668 Documentation Snag

Another chip I'm using in my current project is the AD5668 8-channel 16-bit DAC.  The chip comes in a variety of suffixes that change the accuracy and power-up output states.  The wiring is simple for the chip, but the documentation contains an easy to overlook nuance.  I found myself stuck, looking at perfect signals, but an unresponsive DAC.

The nuance comes into play when sending certain commands to the AD5668.  The specific commands are Power-up / down channel, Set-up Internal Ref, Load Clear Code Register, and Load LDAC Register.  When using these commands it is important to notice that DB0 is different from D0. The DB bits are the bits for the entire 32-bit message.  The D0 bits only apply when the start and end bits of the message are Don't Cares.  It is never specifically mentioned in words, only in the command diagrams, which I overlooked.